Wireless communication systems employ power amplifiers for increasing the power of radio frequency (RF) signals. In a wireless communication system, a power amplifier forms a portion of the last amplification stage in a transmission chain before provision of the amplified signal to an antenna for radiation over the air interface. High gain, high linearity, stability, and a high level of power-added efficiency are characteristics of a desirable amplifier in such a wireless communication system.
In general, a power amplifier operates at maximum power efficiency when the power amplifier transmits close to saturated power. However, power efficiency tends to worsen as output power decreases. Recently, the Doherty amplifier architecture has been the focus of attention not only for base stations but also for mobile terminals because of the architecture's high power-added efficiency over a wide power dynamic range.
The high efficiency of the Doherty architecture makes the architecture desirable for current and next-generation wireless systems. However, the architecture presents challenges in terms of semiconductor package design. Current Doherty amplifier semiconductor package designs call for the use of discrete devices, conductors, and integrated circuits to implement each amplification path. For example, the carrier and peaking amplification paths each may include a distinct power transistor IC die, along with distinct inductance and capacitance components. These distinct power transistor IC dies and components are maintained a distance apart in a typical device package in order to limit potential performance degradation that may occur due to signal coupling between the carrier and peaking amplifiers. More specifically, undesirable signal coupling between the carrier and peaking amplifiers may involve the transfer of energy between components of the carrier and peaking amplifier paths through magnetic and/or electric fields associated with the signals carried on those amplifier paths.
Unfortunately, the desire to maintain a significant spatial distance between amplifier paths in a device package in order to reduce coupling between the paths limits the potential for miniaturization of the semiconductor package. Limiting miniaturization is undesirable where low cost, a low weight, and a small volume and small PCB real estate are important package attributes for various applications.